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Issue Date	Title	Author(s)
Dec-2012	Design and Error Analysis of a Scale Free CORDIC Unit with Corrected Scale Factor	Prasad, N; Swain, A K; Mahapatra, K K
Mar-2013	FPGA Implementation of Pipelined CORDIC Based Quadrature Direct Digital Synthesizer with Improved SFDR	Prasad, N; Swain, A K; Mahapatra, K K
2013	Performance Evalulation of Different Routing Algorithms in Network on Chip	Singh, J K; Swain, A K; Reddy, T N K; Mahapatra, K K
2014	A Novel Bit Stuffing technique for Controller Area Network (CAN) Protocol	Jena, T R; Swain, A K; Mahapatra, K K
Mar-2014	Performance Assessment of Different Network-on-Chip Topologies	Reddy, T N K; Swain, A K; Singh, J K; Mahapatra, K K
Aug-2016	FPGA Prototyping and Parameterised based Resource Evaluation of Network on Chip Architecture	Swain, A K; Rajesh Kumar, B; Satpathy, S N; Mahapatra, K K
Dec-2016	Parametric Performance Analysis of Synchronous and Asynchronous Heterogeneous Network on Chip	Swain, A K; Rajput, A K; Mahapatra, K K