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Issue Date
Title
Author(s)
Dec-2012
Design and Error Analysis of a Scale Free CORDIC Unit with Corrected Scale Factor
Prasad, N
;
Swain, A K
;
Mahapatra, K K
Mar-2013
FPGA Implementation of Pipelined CORDIC Based Quadrature Direct Digital Synthesizer with Improved SFDR
Prasad, N
;
Swain, A K
;
Mahapatra, K K
Aug-2016
FPGA Prototyping and Parameterised based Resource Evaluation of Network on Chip Architecture
Swain, A K
;
Rajesh Kumar, B
;
Satpathy, S N
;
Mahapatra, K K
Discover
Author
2
Prasad, N
1
Rajesh Kumar, B
1
Satpathy, S N
Subject
1
Scaling free CORDIC
1
SFDR
1
slice delay product
.
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2016
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