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Issue Date
Title
Author(s)
Jun-2011
A Low-Power Circuit Technique for Dynamic CMOS Logic
Meher, P
;
Mahapatra, K K
Mar-2012
Improved Techniques for High Performance Noise-Tolerant Domino CMOS Logic Circuits
D, Srinivasa V S Sarma
;
Mahapatra, K K
Oct-2014
A Low-Power CMOS Flip-Flop for High Performance Processors
Meher, P
;
Mahapatra, K K
Discover
Author
2
Meher, P
1
D, Srinivasa V S Sarma
Subject
2
power consumption
1
CMOS
1
Dynamic logic
1
dynamic logic
1
Flip-Flop
1
leakage current
1
leakage tolerance
1
Low power
1
noise tolerance
1
Power-delay product
.
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Date issued
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2014
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2012
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2011