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Please use this identifier to cite or link to this item: http://hdl.handle.net/2080/1676

Title: An Improved Feedthrough Logic for Low Power Circuit Design
Authors: Sahoo, S R
Mahapatra, K K
Keywords: Feedthrough logic (FTL)
dynamic CMOS logic
low-power adder
Issue Date: Mar-2012
Citation: Recent Advances in information Technology (RAIT-2012),15-17 March2012, ISM, Dhanbad (Jharkhand)
Abstract: This paper presents the design of a low power dynamic circuit using a new CMOS domino logic family called feedthrough logic. Dynamic logic circuits are more significant because of its faster speed and lesser transistor requirement as compared to static CMOS logic circuits. The proposed circuit has very low dynamic power consumption compared to the recently proposed circuit techniques for the dynamic logic styles. The concept is validated through extensive simulation.The problem of requirement of output inverter and noninverting logic are also completely eliminated in the proposed design.
Description: Copyright belongs to proceeding publisher
URI: http://hdl.handle.net/2080/1676
Appears in Collections:Conference Papers

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