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dc.contributor.authorSahoo, S R-
dc.contributor.authorMahapatra, K K-
dc.identifier.citationRecent Advances in information Technology (RAIT-2012),15-17 March2012, ISM, Dhanbad (Jharkhand)en
dc.descriptionCopyright belongs to proceeding publisheren
dc.description.abstractThis paper presents the design of a low power dynamic circuit using a new CMOS domino logic family called feedthrough logic. Dynamic logic circuits are more significant because of its faster speed and lesser transistor requirement as compared to static CMOS logic circuits. The proposed circuit has very low dynamic power consumption compared to the recently proposed circuit techniques for the dynamic logic styles. The concept is validated through extensive simulation.The problem of requirement of output inverter and noninverting logic are also completely eliminated in the proposed design.en
dc.format.extent194456 bytes-
dc.subjectFeedthrough logic (FTL)en
dc.subjectdynamic CMOS logicen
dc.subjectlow-power adderen
dc.titleAn Improved Feedthrough Logic for Low Power Circuit Designen
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