Please use this identifier to cite or link to this item:
http://hdl.handle.net/2080/823| Title: | Low Power Filter Design using a Novel Dual Edge Triggered Latch |
| Authors: | Das, J K Mahapatra, K K |
| Keywords: | FIR filters flip-flops hearing aids low-power electronics |
| Issue Date: | 2008 |
| Publisher: | IEEE |
| Citation: | International Conference on Electronic Design, ICED, Penang December 1-3,2008. |
| Abstract: | In the present investigation, a low power FIR filter using FDF structure is designed which is a key component in a hearing aid application. The details of design are presented. A novel low power latch using 10 transistors is pro-posed that uses dual edge triggering. It is shown a power saving up to 65% is achieved in the FIR filter using the proposed latch. This filter will find application in a hearing aid, which demands area/power constraint and would be useful for other DSP based portable devices. |
| URI: | http://dx.doi.org/10.1109/ICED.2008.4786698 http://hdl.handle.net/2080/823 |
| Appears in Collections: | Conference Papers |
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