Please use this identifier to cite or link to this item:
Full metadata record
DC FieldValueLanguage
dc.contributor.authorDas, J K-
dc.contributor.authorMahapatra, K K-
dc.identifier.citationInternational Conference on Electronic Design, ICED, Penang December 1-3,2008.en
dc.description.abstractIn the present investigation, a low power FIR filter using FDF structure is designed which is a key component in a hearing aid application. The details of design are presented. A novel low power latch using 10 transistors is pro-posed that uses dual edge triggering. It is shown a power saving up to 65% is achieved in the FIR filter using the proposed latch. This filter will find application in a hearing aid, which demands area/power constraint and would be useful for other DSP based portable devices.en
dc.format.extent981651 bytes-
dc.subjectFIR filtersen
dc.subjecthearing aidsen
dc.subjectlow-power electronicsen
dc.titleLow Power Filter Design using a Novel Dual Edge Triggered Latchen
Appears in Collections:Conference Papers

Files in This Item:
File Description SizeFormat 
das.pdf958.64 kBAdobe PDFView/Open

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.