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http://hdl.handle.net/2080/5010| Title: | Improving Self-Fault-Tolerance Capability of Memristor Crossbar Using a Weight-Sharing Approach |
| Authors: | Yadav, Dev Narayan Thangkhiew, Phrangboklang Lyngton Lalchhandama, F Datta, Kamalika Drechsler, Rolf Sengupta, Indranil |
| Keywords: | Fault tolerance Memristor crossbar Neural network Stuck-at-faults Weight-sharing |
| Issue Date: | Dec-2024 |
| Citation: | 33rd IEEE Asian Test Symposium (ATS 2024), Ahmedabad, Gujarat (India), 17-20 December 2024 |
| Abstract: | The ability of resistive memory (ReRAM) to naturally conduct vector-matrix multiplication (VMM), the primary operation carried out in neural networks, has caught the interest of researchers. The memristor crossbar is a suitable architecture to perform VMM and additionally offers benefits like in-memory computation (IMC), low power, and high density. Memristorbased neural networks are typically trained using a mechanism where weight computations are carried out on a host machine and downloaded into the crossbar. However, due to faulty memristors in the crossbar, a cell may not be able to store the exact weight values, which may lead to inference errors. In this paper, we propose a weight-sharing method to improve the self-faulttolerance capability of memristor crossbar. In order to reduce the impact of faulty memristors, the weights are shared among different layers of memristors in a 3D crossbar. Simulation analyses show considerable improvements in the fault-tolerance capability of the crossbar. |
| Description: | Copyright belongs to the proceeding publisher. |
| URI: | http://hdl.handle.net/2080/5010 |
| Appears in Collections: | Conference Papers |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 2024_ATS_DNYadav_Improving.pdf | 736.69 kB | Adobe PDF | View/Open Request a copy |
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