Please use this identifier to cite or link to this item: http://hdl.handle.net/2080/3049
Title: PUF-based Secure Test Wrapper for SoC Testing
Authors: Sudeendra Kumar, K
Seth, Saurabh
Sahoo, Sauvagya
Mahapatra, Abhishek
Swain, Ayas Kanta
Mahapatra, K K
Keywords: IEEE 1500
Physical Unclonable Function
Hardware Security
Issue Date: Jul-2018
Publisher: IEEE
Citation: IEEE Computer Society Annual Symposium on VLSI,8-11 July 2018, Hong Kong SAR, China
Abstract: The increased testability and observability due to test structures make chips vulnerable to side channel attacks. The intention of side channel attack are leaking secret keys used in cryptographic cores and getting access to trade related sensitive information stored in chips. Several countermeasures against test based side-channel attacks are available in research literature. One such countermeasure scheme is password based access protection to IEEE 1500 test wrapper, such that only an authentic user with valid password is allowed to access the test structures. IEEE 1500 is a core test standard for enabling the streamlined test integration and test reuse. The trust model of existing schemes assume outsourced assembly and test (OSAT) centre are completely trusted and design house will share secret keys to unlock the IEEE 1500 wrapper during testing. In this paper, we propose a Physical Unclonable Function (PUF) based technique incorporating challenge-response to support comprehensive test security in which there is no need for design house to share secret keys with untrusted OSAT centre to unlock the scan chains. The proposed scheme comes at the cost of reasonable area and performance overhead.
Description: Copyright of this paper belongs to proceedings publisher
URI: 10.1109/ISVLSI.2018.00127
http://hdl.handle.net/2080/3049
Appears in Collections:Conference Papers

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