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Title: A High Speed Encoder for a 5GS/s 5 Bit Flash ADC
Authors: Varghese, G T
Mahapatra, K K
Keywords: Analog to digital converter
Flash ADC
Pseudo dynamic CMOS logic
Issue Date: Jul-2012
Citation: 3rd International Conference on computing communication and networking technologies on SNS college of Engineering, Coimbatore during 26th to 28th July, 2012
Abstract: The present investigation proposes an efficient high speed encoding scheme intended for a 5GS/s 5 bit flash analog to digital converter. The designing of a thermometer code to binary code is one of the challenging issues in the design of a high speed flash ADC. An encoder circuit in this paper translates the ther-mometer code into the intermediate gray code to reduce the ef-fects of bubble errors. To increase the speed of the encoder, the implementation of the encoder through pseudo dynamic CMOS logic is presented. The proposed encoder is designed using 90nm technology at 1.2V power supply using CADENCE tool. The simulation results shown for a sampling frequency of 5GHz and the average power dissipation of the encoder is 1.919mW.
Description: Copyright belongs to proceeding publisher
Appears in Collections:Conference Papers

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