|
DSpace@nitr >
National Institue of Technology- Rourkela >
Conference Papers >
Please use this identifier to cite or link to this item:
http://hdl.handle.net/2080/1213
|
| Title: | Low Cost System on Chip Design for Audio Processing |
| Authors: | Swain, Ayaskanta
Mahapatra, K K |
| Keywords: | Open Core SoC Design
WISHBONE bus interface
Point-to-Point interconnection |
| Issue Date: | 2010 |
| Publisher: | Proceedings of the International Multi Conference of Engineers and Computer Scientists 2010 Vol II , IMECS 2010, March 17-19, Hong Kong |
| Abstract: | System-on-Chip (SoC) design is an integration of
multi million transistors in a single chip for alleviating time to
market and reduce the cost of the design. It uses the concept of
design reuse to increase the productivity with reduction in time.
In this paper we present a platform for a low cost SoC design
using Open Core SoC design methodology. It offers flexible
way of using reusable cores with low cost. In this proposed
design a set of cores from Open Core is collected and integrated
using Open Core WISHBONE interfacing for an audio
processing application. The first primary result shows that the
SoC can be implemented using field programmable gate array
(FPGA). |
| Description: | Copyright for the article belongs to proceedings publishers |
| URI: | http://hdl.handle.net/2080/1213 |
| Appears in Collections: | Conference Papers
|
Files in This Item:
| File |
Description |
Size | Format |
|---|
| IMECS2010_pp1380-1385-1.pdf | | 727Kb | Adobe PDF | View/Open |
|
Show full item record
All items in DSpace are protected by copyright, with all rights reserved.
|
