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Please use this identifier to cite or link to this item:
http://hdl.handle.net/2080/1213
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| DC Field | Value | Language |
| contributor.author | Swain, Ayaskanta | - |
| contributor.author | Mahapatra, K K | - |
| date.accessioned | 2010-03-31T09:53:42Z | - |
| date.available | 2010-03-31T09:53:42Z | - |
| date.issued | 2010 | - |
| identifier.uri | http://hdl.handle.net/2080/1213 | - |
| description | Copyright for the article belongs to proceedings publishers | en |
| description.abstract | System-on-Chip (SoC) design is an integration of
multi million transistors in a single chip for alleviating time to
market and reduce the cost of the design. It uses the concept of
design reuse to increase the productivity with reduction in time.
In this paper we present a platform for a low cost SoC design
using Open Core SoC design methodology. It offers flexible
way of using reusable cores with low cost. In this proposed
design a set of cores from Open Core is collected and integrated
using Open Core WISHBONE interfacing for an audio
processing application. The first primary result shows that the
SoC can be implemented using field programmable gate array
(FPGA). | en |
| format.extent | 745391 bytes | - |
| format.mimetype | application/pdf | - |
| language.iso | en | - |
| publisher | Proceedings of the International Multi Conference of Engineers and Computer Scientists 2010 Vol II , IMECS 2010, March 17-19, Hong Kong | en |
| subject | Open Core SoC Design | en |
| subject | WISHBONE bus interface | en |
| subject | Point-to-Point interconnection | en |
| title | Low Cost System on Chip Design for Audio Processing | en |
| type | Article | en |
| Appears in Collections: | Conference Papers
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Files in This Item:
| File |
Description |
Size | Format |
| IMECS2010_pp1380-1385-1.pdf | | 727Kb | Adobe PDF | View/Open |
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