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Title: Defect Tolerant Approach for Reliable Majority Voter Design Using Quadded Transistor Logic
Authors: Mukherjee, Atin
Keywords: fault tolerance
triple modular redundancy
majority voter
quadded transistor logic
Issue Date: 16-Nov-2020
Citation: 2020 IEEE REGION 10 CONFERENCE (TENCON)Osaka, Japan, November 16-19, 2020
Abstract: In this paper, we have proposed a new fault tolerant design technique for majority voter that is used in selection of final output for fault-tolerant methods like N-tuple modular redundancy (NMR) and N-tuple interwoven redundancy (NIR). The common assumption that majority voters are robust and hence does not affect the final reliability of a system, is false for most of the practical applications. We have used redundancy at transistor level combined with redundancy at gate level to design a defect tolerant majority voter that provides notable improvement in reliability over conventional triple modular redundancy technique using traditional non-reliable voters and other existing methods
Description: Copyright of this paper is with proceedings publisher
Appears in Collections:Conference Papers

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