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Title: Defect Tolerant Majority Voter Design Using Triple Transistor Redundancy
Authors: Mukherjee, Atin
Dhar, Anindya Sundar
Keywords: Defect tolerance
Majority voter
Triple Modular Redundancy (TMR)
Issue Date: Dec-2019
Publisher: IEEE
Citation: IEEE International Symposium on Smart Electronic Systems(IEEE-iSES), Rourkela, India, 16-18 December 2019
Abstract: In this paper, we propose a new defect tolerant majority voter based on transistor level redundancy. Majority voter chooses the winner signal with most votes and is used to select the corrected final signal in cases for fault-tolerant methods like N-tuple modular redundancy (NMR) and N-tuple interwoven redundancy (NIR). Generally the voters are assumed to be robust in nature and do not affect the design. But in practice, a fault in the voter may affect the final output of the circuit resulting in complete failure of the system. We have used new triple transistor redundancy method combined with gate level redundancy to design fault tolerant majority voter that offers very high reliability while used in conjunction with triple modular redundancy (TMR) or triple interwoven redundancy (TIR) in designing failure tolerant safety critical systems. Theoretical, as well as simulation results have been provided to prove the superiority of our design.
Description: Copyright belongs to proceeding publisher
Appears in Collections:Conference Papers

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