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Title: Security Enhancements to System on Chip Devices for IoT Perception Layer
Authors: Kumar K, Sudeendra
Sahoo, Sauvagya
Mahapatra, Abhishek
Swain, Ayas Kanta
Mahapatra, K. K
Keywords: Internet of Things
Microcontroller/System-on-Chip Security
Hardware Security
Security Infrastructure IP
Issue Date: Dec-2017
Citation: IEEE International Symposium on Nanoelectronic and Information Systems (IEEE-iNIS), Bhopal, India, 18 - 20 December, 2017
Abstract: Internet of Things (IoT) will drive the growth for semiconductor industry in next decade. In the era of IoT, millions of smart computing things are connected to solve customized applications. The tenets of IoT design are agility, scalability and security. Security is one of the important tenets for the success of IoT. In this paper, we discuss the challenges and possible solutions for IoT security that needs to be addressed at IoT perception layer/Edge node. The inevitable component of the IoT edge node is microcontroller/System on Chip (SoC). The microcontroller/SoC used in sensitive applications consists of Trusted Execution Environment (TEE), a hardware support for security. TEE’s are not sufficient to address all the security issues in IoT systems. Hardware security issues like hardware Trojans, counterfeiting and debug security are tightly interlinked with the IoT perception layer security. There can be common solution to the hardware security issues and IoT perception layer security. In this paper, we briefly discuss the challenges in IoT design, IoT security, vulnerabilities of edge device, existing solutions and need for new security architecture for IoT edge nodes. And finally we present what security features, the next generation SoC/microcontrollers should incorporate to solve both hardware intrinsic security and IoT perception layer security more holistically.
Description: Copyright of this document belongs to proceedings publisher.
Appears in Collections:Conference Papers

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