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Title: Microprocessor Based Physical Unclonable Function
Authors: Kumar K, Sudeendra
Sahoo, Sauvagya
Mahapatra, Abhishek
Swain, Ayas Kanta
Mahapatra, K. K
Keywords: Physical Unclonable function
Hardware security
Issue Date: Dec-2017
Citation: IEEE International Symposium on Nanoelectronic and Information Systems (IEEE-iNIS), Bhopal, India, 18 - 20 December, 2017
Abstract: Research on Physical Unclonable Functions (PUF) is well established topic in the field of hardware security. PUF is useful in many security applications like IC metering, IP protection and cryptographic key generation. The PUF circuits proposed in the past are dedicated circuits which are extra overhead in terms of area and power. Utilizing the existing circuit structures like microprocessor, power rails, etc to design PUF can be seen in recent literature. In this paper, we propose a PUF topology based on microprocessor and CRP generation method. We present the interim result in terms of hamming distance to prove sufficient randomness in path delays in the hardware multiplier of OpenMSP430 microprocessor which can be exploited to design the PUF. The simulation and statistical analysis technique is also discussed.
Description: Copyright of this document belongs to proceedings publisher.
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