Virtual Fabrication of Short-Channel RecessedSource/Drain (Re-S/D) SOI MOSFETs

Abstract

This paper describes process and device simulation results of short-channel Recessed Source/Drain (Re-S/D) SOI MOSFETs. A Re-S/D SOI MOSFET with 30nm channel length, and 10nm channel thickness, is virtually fabricated with reduced short channel effects (SCEs) and low source/drain series resistance. The processing steps, which are required to obtain the structure of the Re-S/D SOI MOSFET, are proposed and explained in detail. The electrical characteristic Ids versus drain to source voltage VDS is obtained for different values of VGS and Re-S/D thickness (trsd). The device is virtually fabricated using 2D process simulator ATHENA, followed by electrical characterization which is done with the help of device simulator ATLASTM from SILVACO.