Please use this identifier to cite or link to this item: http://hdl.handle.net/2080/2278
Title: Rapid Prototyping of FPGA Based Digital Controller of DSTATCOM for Load Compensation Under Distorted Utility Condition
Authors: Sahu, G
Kolluru, V R
Mahapatra, K K
Keywords: Field programmable gate Array
Distribution Static Compensator
Rapid prototyping
Issue Date: Feb-2015
Publisher: IEEE
Citation: IEEE International Conference on Signal Processing, Informatics, Communication and Energy Systems, National Institute of Technology Calicut, Kozhikode,February 19-21, 2015
Abstract: This paper presents rapid prototyping of FPGA based digital controller for Distribution STATic COMpensator (DSTATCOM) using Matlab/Simulink and System Generator. The MATLAB/Simulink models are optimized and converted to target-specific synthesized VHDL code for FPGA implementation. Simulation, co-simulation, system level design and verification for rapid prototyping of FPGA-based digital controller are necessary to develop prototype in a relatively short time span by avoiding time-consuming manual coding. This enables increased productivity and facilitates the development of digital controller with more complex control algorithms. This prototype controller is developed and implemented on evaluation boardXUPV5 with Virtex-5 xc5vlx110t chip. This design is verified with System Generator co-simulation platform and found total harmonic distortion of load compensation well within the allowable range of IEEE standards with unit power factor achievement.
Description: Copyright belongs to the Proceeding of Publisher
URI: http://hdl.handle.net/2080/2278
Appears in Collections:Conference Papers

Files in This Item:
File Description SizeFormat 
1570055523.pdf454.23 kBAdobe PDFView/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.