Architecting Fabricated Implant in Interconnect formulti-core processor

Abstract

In this paper, we analyze the effect of interconnect on themulti-core processors and have proposed a novel highly scalable on-chipinterconnection mechanism for multi-core processors. As the number ofcores increases, traditional on-chip interconnect like bus and crossbarproves to be low in efficiency as well as suffer from poor scalability. Inorder to get rid of the scalability and efficiency an issue in these traditional interconnects, ring based design has been proposed. But with the steadygrowth in number of cores have rendered the ring interconnect too in-feasible. Thus, novel interconnect designs are proposed for the futuremulti-core processors for enhancement in the scalability. In this paper,we analyze and compare the interconnect of two existing multi-core processors named Multi-core Processor with Internal Network(MPIN) andMult-core processor with Ring Network(MPRN). We have also proposeda highly scalable and efficient interconnect named as fabricated Implantin Interconnect for multi-core processors. The placement of cores andcache in a network is proved to be highly crucial for system performance.The benchmark results are presented by using a full system simulator.Results show that, by using the proposed on-chip interconnect, comparedwith the MPIN and MPRN, the execution time are significantly reducedfor three applications.