Please use this identifier to cite or link to this item:
|Title:||PID with PLL Synchronization Controlled Shunt APLC under Non-Sinusoidal and Unbalanced Conditions|
Mahapatra, K K
|Citation:||National Power Electronics Conference (NPEC-2010), IIT-Roorkee, June 10-13,2010|
|Abstract:||This paper presents Shunt Active Power Line Conditioners (APLC) for compensating reactive power and harmonic currents drawn by the loads besides power factor correction. The shunt APLC is implemented with three phase PWM current controlled voltage source inverter and is connected to the point of common coupling for compensating the current harmonics. The compensation process is based on phase locked loop (PLL) synchronization and proportional integral derivative (PID) controller. These control strategies for shunt APLC makes certain that source current is sinusoidal even when the load is non-sinusoidal and unbalanced. The PWM-VSI inverter switching is done according to gating signals derived from hysteresis band current controller and the capacitor voltage is maintained constant using PID controller. The proposed shunt APLC is investigated using extensive simulation and is found to be effective in terms of THD, active filtering, reactive power compensation and VDC settling time under various balanced and unbalanced load conditions.|
|Appears in Collections:||Conference Papers|
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.