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http://hdl.handle.net/2080/5918| Title: | CardioSNN: A Hardware-Implemented Spiking Neural Network Model for Cardiac Arrhythmia Classification |
| Authors: | Ghosh, Samanway Tabrej, Md Samsh Gon, Anusaka Mukherjee, Atin |
| Keywords: | piking neural network arrhythmia classifica-tion hardware architecture FPGA implementation wearable device |
| Issue Date: | Jun-2026 |
| Citation: | IEEE Guwahati Subsection conference (GCON), Guwahati, 3-5 June 2026 |
| Abstract: | Early detection of cardiac arrhythmia is critical for timely intervention to reduce mortality. Despite very high accuracy, CNNs are often unsuitable for wearable devices due to their high power requirements. This paper proposes a SNN model for arrhythmia detection with high accuracy and low-power hardware implementation. The proposed model employs de-noising, segmentation, and rate coding to preprocess the MIT-BIH arrhythmia database signals, which are then classified using a SNN, trained with STBP algorithm. A multiplier-less design with conditional accumulation and shift-based leakage scaling is implemented for hardware efficiency. The proposed model achieves 98.75% accuracy and 98.67% F1 score, outperforming existing SNN-based models. The FPGA implementation on a ZCU104 achieves functional equivalence with the software model, while consuming only 4mW of dynamic power and attaining a latency of 417.30 ms/beat, thus demonstrating suitability for low-power, real-time wearable devices. |
| Description: | Copyright belongs to the proceeding publisher. |
| URI: | http://hdl.handle.net/2080/5918 |
| Appears in Collections: | Conference Papers |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 2026_GCON_SGhosh_CardioSNN.pdf | 670.45 kB | Adobe PDF | View/Open Request a copy |
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