Welcome to IR @ NIT Rourkela: Browsing DSpace

Browsing by Subject FPGA

Jump to: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
or enter first few letters:

Showing results 1 to 20 of 21 next >

Issue Date	Title	Author(s)
Dec-2025	Asynchronous FIFO in FPGA for Video Acquisition in IoT-Based Systems	Konar, Arpan; Balani, Lakshay; Acharya, Debiprasad Priyabrata
Dec-2012	Design and Error Analysis of a Scale Free CORDIC Unit with Corrected Scale Factor	Prasad, N; Swain, A K; Mahapatra, K K
Apr-2024	Design and FPGA Implementation of Five Stage Pipelined RISC -V Processor	Hussain, Faeq; Sarkar, Santanu
Dec-2010	Design and Verification of WISHBONE Bus Interface for System-on-Chip Integration	Swain, Ayaskanta; Mahapatra, K K
Feb-2026	Edge-Driven Key Generation for Lightweight Image Encryption Using Hardware-Accelerated Sobel Filtering on PYNQ-Z2	Mohanty, Pradeep Kumar; Swain, Ayas Kanta; Kumar, K Sudeendra; Mahapatra, Kamalakanta; Dash, Dinesh Kumar; Swain, Raghunandan
Feb-2011	An Efficient Distributed Arithmetic based VLSI Architecture for DCT	Sharma, V K; Mahapatra, K K; Pati, U C
May-2024	FPGA Accelerated Convolutional Neural Network for Detection of Cardiac Arrhythmia	Mangaraj, Soumyashree; Oraon, Pawan; Ari, Samit; Swain, Ayas Kanta; Mahapatra, Kamalakanta
Feb-2013	FPGA for Reliance on Cloud Computing	Mohanty, J P; Mahapatra, K K
Apr-2013	FPGA Implementation of Discrete Fourier Transform Core Using NEDA	Mankar, A; N, Prasad; Meher, S
Mar-2013	FPGA Implementation of Pipelined CORDIC Based Quadrature Direct Digital Synthesizer with Improved SFDR	Prasad, N; Swain, A K; Mahapatra, K K
Aug-2016	FPGA Prototyping and Parameterised based Resource Evaluation of Network on Chip Architecture	Swain, A K; Rajesh Kumar, B; Satpathy, S N; Mahapatra, K K
Jul-2026	FPGA-Based Hardware Implementation of Image Filtering Techniques for Noisy Image Restoration	Behera, Spandana; Patnaik, Jyotimayee; Mohanty, Pradeep Kumar; Swain, Ayas Kanta; Mahapatra, Kamalakanta
Oct-2015	Fuel Cell for Standalone Application Using FPGA Based Controller	Mahapatra, K K; Bhuyan, K C
Jun-2024	Hardware Accelerated Quantized Hand Written Digit Recognition via High Level Synthesis	Oraon, Pawan; Mangaraj, Soumyashree; Swain, Ayas Kanta; Mahapatra, Kamalakanta
Mar-2012	A New Approach for High Performance and Efficient Design of CORDIC Processor	Jain, R K; Sharma, V K; Mahapatra, K K
Jan-2025	Novel Hardware Architectures for PRESENT Block Cipher and its FPGA Realizations	Mishra, Ruby; Okade, Manish; Mahapatra, Kamalakanta
Apr-2013	Real-Time Implementation of Fast Fourier Transform (FFT) and Finding the Power Spectrum Using LabVIEW and CompactRIO	Das, A D; Mahapatra, K K
Mar-2025	SecFit: Secured Hardware Prototype for IoT-based Healthcare Applications	Mishra, Ruby; Okade, Manish; Mahapatra, Kamalakanta
Feb-2026	SPI Based Secure Communication Framework for Industrial IoT	Motilal, Soumyadip; Chatterjee, Soumita; Swain, Ayas Kanta; Mahapatra, Kamalakanta
2011	A Survey on Hardware Implementation of IDEA Cryptosystem	Mukherjee, S; Sahoo, Bibhudatta

Showing results 1 to 20 of 21 next >