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http://hdl.handle.net/2080/825
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DC Field | Value | Language |
---|---|---|
dc.contributor.author | Pattnaik, S | - |
dc.contributor.author | Panda, A K | - |
dc.date.accessioned | 2009-05-18T06:01:24Z | - |
dc.date.available | 2009-05-18T06:01:24Z | - |
dc.date.issued | 2008 | - |
dc.identifier.citation | IEEE Region 10 Colloquium and the Third International Conference on Industrial and Information Systems, Kharagpur, India December 8-10, 2008 | en |
dc.identifier.uri | http://hdl.handle.net/2080/825 | - |
dc.description.abstract | A new multi-phase PWM DC-DC converter with an auxiliary circuit to reduced switching losses across the switches, is designed, in order to solve the problem of meeting the power supply requirements of the new generation microprocessor, which requires 40-100 A current, lower voltage and better current transient response. The multi-phase topology benefits in components size reduction resulting in power density increase that allows power supply to reduce size and increase efficiency and performances. These reductions accrue from the higher effective conversion frequency with higher frequency ripple current due to the phase interleaving process of this topology. High current multiphase buck converters are finding use in computing, graphics, and telecom applications. In this paper, designed of two phases DC-DC converter of 100W, 12 V / 1 V of efficiency 97 % is discussed in detail and experimental results are presented to support the theoretical analysis. | en |
dc.format.extent | 261511 bytes | - |
dc.format.mimetype | application/pdf | - |
dc.language.iso | en | - |
dc.publisher | IEEE | en |
dc.subject | DC-DC | en |
dc.subject | Interleaving | en |
dc.subject | Multiphase | en |
dc.subject | PWM | en |
dc.title | An Improved Multiphase Converter for New Generation Micorprocessor | en |
dc.type | Article | en |
Appears in Collections: | Conference Papers |
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