Please use this identifier to cite or link to this item: http://hdl.handle.net/2080/823
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dc.contributor.authorDas, J K-
dc.contributor.authorMahapatra, K K-
dc.date.accessioned2009-05-18T06:00:57Z-
dc.date.available2009-05-18T06:00:57Z-
dc.date.issued2008-
dc.identifier.citationInternational Conference on Electronic Design, ICED, Penang December 1-3,2008.en
dc.identifier.urihttp://dx.doi.org/10.1109/ICED.2008.4786698-
dc.identifier.urihttp://hdl.handle.net/2080/823-
dc.description.abstractIn the present investigation, a low power FIR filter using FDF structure is designed which is a key component in a hearing aid application. The details of design are presented. A novel low power latch using 10 transistors is pro-posed that uses dual edge triggering. It is shown a power saving up to 65% is achieved in the FIR filter using the proposed latch. This filter will find application in a hearing aid, which demands area/power constraint and would be useful for other DSP based portable devices.en
dc.format.extent981651 bytes-
dc.format.mimetypeapplication/pdf-
dc.language.isoen-
dc.publisherIEEEen
dc.subjectFIR filtersen
dc.subjectflip-flopsen
dc.subjecthearing aidsen
dc.subjectlow-power electronicsen
dc.titleLow Power Filter Design using a Novel Dual Edge Triggered Latchen
dc.typeArticleen
Appears in Collections:Conference Papers

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