Advanced Silicon Nanowire Fabrication and Annealing Temperature Optimization for Improving Solar Cell Efficiency

Abstract

Silicon nanowires (SiNWs) are garnering attention for potential in future photovoltaic technology. The notable features outperform conventional bulk silicon, including a large surface area, anti-reflective properties, and shorter carrier transportation paths. However, a key challenge lies in the fabrication and doping of SiNWs for p-n junction in SiNW-based photovoltaics. The work employs cost-effective pre-optimized metal-assisted chemical etching (MACE) parameters for p-type SiNW array fabrication and spin-on-doping with P2O5 as the P-source by phosphosilicate glass (PSG) layer formation to form an n-type emitter. A Teflon-lined stainless-steel MACE setup was used for the SiNW array fabrication to avoid the unwanted SiNW formation on the rear side of the Si substrate. The annealing temperature was optimized considering the doping diffusion depth and the oxidation layer on the inner surface of the nanopores of the SiNW tips. Annealing above 900 ºC causes oxidation on SiNW tips, leading to tip dissolution during PSG layer removal, shortening SiNW length, and widening of the bandgap. The increase in annealing temperature dissolves the surface phosphorus clusters, improving the doping uniformity with increased doping depth. The optimized annealing temperature (900 ºC) results in a bandgap of 1.57 eV, with a 42.6% improvement in ultimate efficiency. With the fabrication modification and annealing temperature optimization, the power conversion efficiency and fill factor improved by 33.7% and 37.6%, respectively, primarily due to increased shunt resistance.