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http://hdl.handle.net/2080/4599
Title: | Hardware Accelerated Quantized Hand Written Digit Recognition via High Level Synthesis |
Authors: | Oraon, Pawan Mangaraj, Soumyashree Swain, Ayas Kanta Mahapatra, Kamalakanta |
Keywords: | FPGA Convolutional Neural Network Hardware Accelerator Python, PYNQ-Z2 High Level Synthesis Pipelining Unrolling |
Issue Date: | Jun-2024 |
Citation: | Great Lakes Symposium on VLSI 2024 (GLSVLSI 24), 12-14 June 2024 |
Abstract: | Convolutional Neural Networks (CNNs) have demonstrated re-markable success in image recognition tasks, but their deployment on resource-constrained devices remains challenging due to their computational complexity and memory requirements. This abstract presents an overview of hardware accelerator implementations for CNN-based image recognition, focusing on techniques to optimize performance, energy efficiency, and resource utilization. Hardware accelerators such as Field-Programmable Gate Arrays (FPGAs) offer parallel processing capabilities that can exploit the inherent paral-lelism in CNN computations. Design considerations include optimiz-ing memory access patterns, and minimizing communication over-head between processing elements. Techniques such as pipelining, unrolling, quantization, and network compression are employed to reduce the computational and memory footprint of CNN models without significantly compromising accuracy. Hardware-software co-design methodologies enable seamless integration of CNN in-ference engines with host systems, facilitating real-time image recognition applications. The computational time of the proposed CNN is lower compared to that of the recent research works. Addi-tionally, the proposed hardware design exhibits reduced memory, power consumption, and resource utilization as compared with recent literarture for MNIST digit recognition with 98.9% accuracy. |
Description: | Copyright belongs to proceeding publisher |
URI: | http://hdl.handle.net/2080/4599 |
Appears in Collections: | Conference Papers |
Files in This Item:
File | Description | Size | Format | |
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2024_GSLVLSI_POraon_Hardware.pdf | 3.48 MB | Adobe PDF | View/Open Request a copy |
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