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http://hdl.handle.net/2080/4578
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DC Field | Value | Language |
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dc.contributor.author | Mangaraj, Soumyashree | - |
dc.contributor.author | Oraon, Pawan | - |
dc.contributor.author | Ari, Samit | - |
dc.contributor.author | Swain, Ayas Kanta | - |
dc.contributor.author | Mahapatra, Kamalakanta | - |
dc.date.accessioned | 2024-05-28T13:26:10Z | - |
dc.date.available | 2024-05-28T13:26:10Z | - |
dc.date.issued | 2024-05 | - |
dc.identifier.citation | 4th IEEE International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA), Amrita Vishwa Vidyapeetham, Bengaluru, 17-18 May 2024 | en_US |
dc.identifier.uri | http://hdl.handle.net/2080/4578 | - |
dc.description | Copyright belongs to proceeding publisher | en_US |
dc.description.abstract | Electrocardiogram signals (ECG) are vital features to identify a healthy body; diagnosing cardiovascular diseases (CVDs) automatically with resource constraint devices at the edge has caught a significant attention in the rapid growth of smart health-care system. The rapidly developing smart world of IoT demands for low latency, less complex, and energy efficient architectures, and their deployment in real time scenarios. Field Programmable Gate Arrays (FPGAs) is a trading distributed embedded platform proving parallel processing, and flexibility in re-design with its re-configurable advancements. This work demonstrates a spilt 2D convolutional neural network (CNN) performing ECG beat classification on Xilinx’s ZCU 104 FPGA board. The convolution has been carried out depth-wise, and performing a channel-wise addition of the half-split feature maps, so as to minimize the resource utilization by reducing the trainable parameters. A customized FPGA IP has been generated using Vitis High Level Synthesis (HLS) tool, and is implemented on ZCU 104 FPGA for the proposed less complex light-weight model. The design has achieved an accuracy of 98.64% in software, and consumed a total power of 4.177W with a latency of 2.19E8ns in classifying arrhythmia reference to Association for the Advancement of Medical InstrumentationAAMI EC57 standard. | en_US |
dc.description.sponsorship | Electrocardiogram, , CNN, FPGA, HLS | en_US |
dc.subject | Electrocardiogram | en_US |
dc.subject | Beat classification | en_US |
dc.subject | CNN | en_US |
dc.subject | FPGA | en_US |
dc.title | FPGA Accelerated Convolutional Neural Network for Detection of Cardiac Arrhythmia | en_US |
dc.type | Article | en_US |
Appears in Collections: | Conference Papers |
Files in This Item:
File | Description | Size | Format | |
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2024_VLSI_SATA_SMangaraj_FPGA.pdf | 2.44 MB | Adobe PDF | View/Open Request a copy |
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