Design of Single Node Upset Resilient Latch for Low Power, Low Cost and Highly Robust Applications

Abstract

This paper proposes a soft error-resilient latch (SERL), which is capable of self-recovering of all possible single event upsets (SEU). The latch mainly uses two 1-output Celements and a 2-output C-element to create interlocked feedback loops. Simulation results from Mentor Graphics TSPICE show that proposed SERL is complete resilient to SEU from all of its internal nodes and the output node. Compared to the existing SEU resilient latches, the proposed latch shows the least power dissipation and area overhead, and the lowest cost in terms of power delay area product (PDAP). The proposed latch saves on average approximately 24.29% power, 10.24% area, improves 12% delay and 40% PDAP in comparision to other existing resilient latches.