Please use this identifier to cite or link to this item: http://hdl.handle.net/2080/4066
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dc.contributor.authorSamal, Anwesh Kumar-
dc.contributor.authorKumar, Sandeep-
dc.contributor.authorMukherjee, Atin-
dc.date.accessioned2023-09-29T05:49:52Z-
dc.date.available2023-09-29T05:49:52Z-
dc.date.issued2023-09-
dc.identifier.citation7th IEEE International Test Conference in Asia (ITC-Asia) 2023, Matsue, Shimane, Japan, September 12-14, 2023en_US
dc.identifier.urihttp://hdl.handle.net/2080/4066-
dc.descriptionCopyright belongs to proceeding publisheren_US
dc.description.abstractThis paper proposes a soft error-resilient latch (SERL), which is capable of self-recovering of all possible single event upsets (SEU). The latch mainly uses two 1-output Celements and a 2-output C-element to create interlocked feedback loops. Simulation results from Mentor Graphics TSPICE show that proposed SERL is complete resilient to SEU from all of its internal nodes and the output node. Compared to the existing SEU resilient latches, the proposed latch shows the least power dissipation and area overhead, and the lowest cost in terms of power delay area product (PDAP). The proposed latch saves on average approximately 24.29% power, 10.24% area, improves 12% delay and 40% PDAP in comparision to other existing resilient latches.en_US
dc.subjectSingle node upseten_US
dc.subjectradiation hardened latchen_US
dc.subjectrobustnessen_US
dc.subjectrobustnessen_US
dc.subjectsingle event upseten_US
dc.titleDesign of Single Node Upset Resilient Latch for Low Power, Low Cost and Highly Robust Applicationsen_US
dc.typeArticleen_US
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