A Low Offset Switched Capacitor based Interfacing Circuit for Integrated Capacitive Sensors

Abstract

This paper presents a low offset, differential output, switched capacitor based capacitive sensor interfacing circuit. The interfacing circuit senses the physical signal as a change in capacitance from a differential capacitive sensor and generates a differential output voltage. Chopper modulation, charge amplification, and auto-zeroing techniques are applied to the proposed circuit to minimize the effect of offset and low-frequency noise introduced by the circuit components. The interfacing circuit contains a fully differential operational amplifier, offset reduction scheme, buffer and low pass filter. The main advantage of the interfacing circuit is utilizing a single differential capacitive sensor and a single feedback network with minimum circuit components. The gain of the interfacing circuit is programmable through the feedback capacitor of the charge amplifier configuration. The interfacing circuit is designed using SCL 0.18 µm CMOS process technology and simulated using spectre simulator. The simulation results with and without offset reduction scheme are presented to show how effectively the proposed circuit is reducing the effect of offset and low-frequency noise.