Please use this identifier to cite or link to this item:
http://hdl.handle.net/2080/2719
Title: | Reduced Latency Square-Root calculation for Signal Processing using Radix-4 Hyperbolic CORDIC |
Authors: | Kumari, Aishwarya Acharya, D P |
Keywords: | CORDIC algorithm Radix-4 Pipelined architectures |
Issue Date: | Jun-2017 |
Publisher: | Springer |
Citation: | 5th International Conference on Advanced Computing, Networking, and Informatics(ICACNI), NIT Goa, Goa, India, 1-3 June 2017 |
Abstract: | Till now the CORDIC algorithm is primarily used to calculate only trigonometric operations. In the proposed work, we extend the Radix-4 CORDIC algorithm to the hyperbolic vectoring mode to implement fast computation of Square-Root. This paper illustrates the implementation of a regular VLSI architecture for Radix-4 hyperbolic vectoring CORDIC on FPGA platform. The speed can further be increased with higher version of FPGA devices. A comparison between Radix-2 and Radix-4 CORDIC algorithm based on the simulation results is also presented in the work. |
Description: | Copyright for this paper belongs to proceeding publisher |
URI: | http://hdl.handle.net/2080/2719 |
Appears in Collections: | Conference Papers |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
2017_ICACNI_AKumari_Reduced.pdf | 772.94 kB | Adobe PDF | View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.