Study of Leakage Current and Interface of ZrO2 gate oxide on Silicon

Abstract

Now-a-days scaling of gate oxide thickness has led to a large enhancement in the leakage current, so high-k gate dielectrics has been focused to overcome the physical roadblock of SiO2 thickness. A Zirconium oxide (ZrO2) thin film was prepared using sol-gel method and deposited on n-Si substrate using spin coating method followed by annealing at 500 °C and 700 °C for 1 hour respectively. In order to provide electrical contacts to the metal oxide semiconductor (MOS) capacitor, aluminium was deposited on both sides of the sample. The structural characteristics of the MOS capacitor were studied from X-Ray Diffraction pattern. The leakage current density was found to be 10-4 A/cm2 at -0.5V with ZrO2 annealed at 700 °C. Moreover, the capacitance voltage (C-V) measurements were taken in order to study the interface properties. The calculated interface trap density (Dit) is found to be 13.6 x 1011 cm -2 eV-1 for ZrO2/Si interface at 700 °C.