Please use this identifier to cite or link to this item: http://hdl.handle.net/2080/2596
Title: Parametric Performance Analysis of Synchronous and Asynchronous Heterogeneous Network on Chip
Authors: Swain, A K
Rajput, A K
Mahapatra, K K
Keywords: Route
Traffic
HeterogeneousNoC
Latency
Throughput
Issue Date: Dec-2016
Citation: IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), ABV-IITM, Gwalior, India, 19-21 December 2016
Abstract: This paper presents a comparison of throughput and end-to-end latency of synchronous and asynchronous heterogeneous NoC under uniform and exponential traffic conditions using different parameters. The parameters we have chosen are no. of cores, load (traffic) and no. of VCs of a router. Further, sink bandwidth analysis of synchronous and asynchronous NoC under uniform traffic was studied and compared. The experimental results show that asynchronous NoC offers more bandwidth, high throughput and low latency than the synchronous NoC for a given no. of VCs and cores.
Description: Copyright belongs to the Proceeding of Publisher
URI: http://hdl.handle.net/2080/2596
Appears in Collections:Conference Papers

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