Please use this identifier to cite or link to this item: http://hdl.handle.net/2080/2280
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dc.contributor.authorDasari, S-
dc.contributor.authorSaramekala, G K-
dc.contributor.authorTiwari, P K-
dc.date.accessioned2015-03-07T10:05:07Z-
dc.date.available2015-03-07T10:05:07Z-
dc.date.issued2015-02-
dc.identifier.citationProceedings of International Symposium on Semiconductor Materials and Devices (ISSMD-3),Crystal Crystal Growth Centre, Anna University, Chennai. 2-5 February 2015.en_US
dc.identifier.urihttp://hdl.handle.net/2080/2280-
dc.descriptionCopyright belongs to the Proceeding of Publisheren_US
dc.description.abstractThis paper describes process and device simulation results of short-channel Recessed Source/Drain (Re-S/D) SOI MOSFETs. A Re-S/D SOI MOSFET with 30nm channel length, and 10nm channel thickness, is virtually fabricated with reduced short channel effects (SCEs) and low source/drain series resistance. The processing steps, which are required to obtain the structure of the Re-S/D SOI MOSFET, are proposed and explained in detail. The electrical characteristic Ids versus drain to source voltage VDS is obtained for different values of VGS and Re-S/D thickness (trsd). The device is virtually fabricated using 2D process simulator ATHENA, followed by electrical characterization which is done with the help of device simulator ATLASTM from SILVACO.en_US
dc.language.isoenen_US
dc.subjectShort Channel Effects (SCEs)en_US
dc.subjectRecessedSource/Drain (Re-S/D) thicknessen_US
dc.subjectElectrical characteristicsen_US
dc.titleVirtual Fabrication of Short-Channel RecessedSource/Drain (Re-S/D) SOI MOSFETsen_US
dc.typeArticleen_US
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