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http://hdl.handle.net/2080/2280
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DC Field | Value | Language |
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dc.contributor.author | Dasari, S | - |
dc.contributor.author | Saramekala, G K | - |
dc.contributor.author | Tiwari, P K | - |
dc.date.accessioned | 2015-03-07T10:05:07Z | - |
dc.date.available | 2015-03-07T10:05:07Z | - |
dc.date.issued | 2015-02 | - |
dc.identifier.citation | Proceedings of International Symposium on Semiconductor Materials and Devices (ISSMD-3),Crystal Crystal Growth Centre, Anna University, Chennai. 2-5 February 2015. | en_US |
dc.identifier.uri | http://hdl.handle.net/2080/2280 | - |
dc.description | Copyright belongs to the Proceeding of Publisher | en_US |
dc.description.abstract | This paper describes process and device simulation results of short-channel Recessed Source/Drain (Re-S/D) SOI MOSFETs. A Re-S/D SOI MOSFET with 30nm channel length, and 10nm channel thickness, is virtually fabricated with reduced short channel effects (SCEs) and low source/drain series resistance. The processing steps, which are required to obtain the structure of the Re-S/D SOI MOSFET, are proposed and explained in detail. The electrical characteristic Ids versus drain to source voltage VDS is obtained for different values of VGS and Re-S/D thickness (trsd). The device is virtually fabricated using 2D process simulator ATHENA, followed by electrical characterization which is done with the help of device simulator ATLASTM from SILVACO. | en_US |
dc.language.iso | en | en_US |
dc.subject | Short Channel Effects (SCEs) | en_US |
dc.subject | RecessedSource/Drain (Re-S/D) thickness | en_US |
dc.subject | Electrical characteristics | en_US |
dc.title | Virtual Fabrication of Short-Channel RecessedSource/Drain (Re-S/D) SOI MOSFETs | en_US |
dc.type | Article | en_US |
Appears in Collections: | Conference Papers |
Files in This Item:
File | Description | Size | Format | |
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ISSMD conference paper ....pdf | 490.66 kB | Adobe PDF | View/Open |
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