Rapid Prototyping of FPGA Based Digital Controller of DSTATCOM for Load Compensation Under Distorted Utility Condition

Abstract

This paper presents rapid prototyping of FPGA based digital controller for Distribution STATic COMpensator (DSTATCOM) using Matlab/Simulink and System Generator. The MATLAB/Simulink models are optimized and converted to target-specific synthesized VHDL code for FPGA implementation. Simulation, co-simulation, system level design and verification for rapid prototyping of FPGA-based digital controller are necessary to develop prototype in a relatively short time span by avoiding time-consuming manual coding. This enables increased productivity and facilitates the development of digital controller with more complex control algorithms. This prototype controller is developed and implemented on evaluation boardXUPV5 with Virtex-5 xc5vlx110t chip. This design is verified with System Generator co-simulation platform and found total harmonic distortion of load compensation well within the allowable range of IEEE standards with unit power factor achievement.