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http://hdl.handle.net/2080/2141
Title: | VHDL Implementation of Circularly Shifted PTS Technique for PAPR Reduction in OFDM |
Authors: | Sahoo, S Patra, S K |
Keywords: | OFDM PTS PAPR Circular shift VHDL |
Issue Date: | May-2014 |
Citation: | International Conference on Advanced Communication, Control and Computing Technologies (ICACCCT), Syed Ammal Engineering College, May 8-10, 2014, Ramanathapuram, Tamilnadu, India. |
Abstract: | This paper presents an efficient VHDL implementation of circularly shifted partial transmit sequence (CS-PTS) scheme for peak-to-average power ratio (PAPR) reduction in orthogonal frequency division multiplexing (OFDM) signals. It eliminates the search for optimum phase factors from a given set, which manifests improved PAPR at reduced computational complexity as compared to conventional PTS (C-PTS). The amplitude of the signal is reduced by rotating each of the partially transmitted sequence anti-clockwise by a pre-determined degree and the peak power is reduced by circularly shifting the quadrature component of the partially transmitted sequence after phase rotation. A brief description of C-PTS and CS-PTS is also presented and VHDL implementation of Circularly Shifted PTS is designed. The peak-to-average power ratio performance of the proposed method has been investigated. |
Description: | Copyright for this article belongs to proceeding publisher |
URI: | http://hdl.handle.net/2080/2141 |
Appears in Collections: | Conference Papers |
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