A Lossless Image Compression Technique using Simple Arithmetic Operations and its FPGA Implementation

Please use this identifier to cite or link to this item: http://hdl.handle.net/2080/1015

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DC Field	Value	Language
dc.contributor.author	Pattanaik, S K	-
dc.contributor.author	Mahapatra, K K	-
dc.date.accessioned	2009-08-11T03:12:29Z	-
dc.date.available	2009-08-11T03:12:29Z	-
dc.date.issued	2006	-
dc.identifier.citation	IEEE International Conference on Industrial Technology, 2006. ICIT, 15-17 December 2006.	en
dc.identifier.uri	http://dx.doi.org/10.1109/ICIT.2006.372532	-
dc.identifier.uri	http://hdl.handle.net/2080/1015	-
dc.description.abstract	Based on some simple arithmetic calculation, an efficient Lossless Image Compression technique is proposed. The proposed algorithm is implemented using Xilinx FPGA. This technique is designed for high quality still image compression, especially PSNR value above 34. This algorithm is most applicable for those images where lossy compression is avoided such as medical and scientific images. The architecture is very simple so the encoding and decoding procedure is very fast.	en
dc.format.extent	1954778 bytes	-
dc.format.mimetype	application/pdf	-
dc.language.iso	en	-
dc.publisher	IEEE	en
dc.title	A Lossless Image Compression Technique using Simple Arithmetic Operations and its FPGA Implementation	en
dc.type	Article	en
Appears in Collections:	Conference Papers

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