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Results 11-20 of 95 (Search time: 0.003 seconds).
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Issue Date
Title
Author(s)
Sep-2010
2-D Separable Discrete Hartley Transform Architecture for Efficient FPGA Resource
Sharma, V K
;
Agrawal, R
;
Pati, U C
;
Mahapatra, K K
2010
Image Compression Using Discrete Tchebichef Transform Algorithm
Senapati, R K
;
Pati, U C
;
Mahapatra, K K
Nov-2010
A Novel Fast Zigzag Prune 4×4 Discrete Tchebichef Moment Based Image Compression Algorithm
Senapati, R K
;
Pati, U C
;
Mahapatra, K K
Dec-2010
An Study of Removal of Subjective Redundancy in JPEG for Low Cost, Low Power, Computation efficient Circuit Design and High Compression Image
Sharma, V K
;
Pati, U C
;
Mahapatra, K K
Jan-2011
An Efficient Sparse 8×8 Orthogonal Transform Matrix for Color Image Compression
Senapati, R K
;
Pati, U C
;
Mahapatra, K K
Dec-2010
A Low Complexity Orthogonal 8×8 Transform Matrix for Fast Image Compression
Senapati, R K
;
Pati, U C
;
Mahapatra, K K
Dec-2010
PLL with PI, PID and Fuzzy Logic Controllers based Shunt Active Power Line Conditioners
Karuppanan, P
;
Mahapatra, K K
Dec-2010
A Novel SRF Based Cascaded Multilevel Active Filter for Power Line Conditioners
Karuppanan, P
;
Mahapatra, K K
Dec-2010
Design and Verification of WISHBONE Bus Interface for System-on-Chip Integration
Swain, Ayaskanta
;
Mahapatra, K K
Jan-2011
A Simple VLSI Architecture for Computation of 2-D DCT, Quantization and Zig-zag ordering for JPEG
Sharma, V K
;
Pati, U C
;
Mahapatra, K K
Discover
Author
14
Pati, U C
11
Karuppanan, P
9
Sharma, V K
8
Sahoo, S R
7
Sahu, G
7
Swain, A K
6
Kolluru, V R
6
Kumar, S
6
Senapati, R K
5
Sudeendra Kumar, K
.
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Subject
9
FPGA
4
Image compression
4
JPEG
3
AES
3
Analog to digital converter
3
DC DC boost converter
3
Domino logic
3
FCPP
3
Feedthrough logic (FTL)
3
Flash ADC
.
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