**Date of Issue** | Title |
Authors |

**2000 ** | A novel current initialization scheme for parallel resonant dc link inverter | *Mahapatra, K K*; *Ghosh, Arindam*; *Joshi, Avinash*; *Doradla, S R* |

**2006 ** | DHT Based JPEG Image Compression Using a Novel Energy Quantization Method | *Pattanaik, S K*; *Mahapatra, K K* |

**2006 ** | A Lossless Image Compression Technique using Simple Arithmetic Operations and its FPGA Implementation | *Pattanaik, S K*; *Mahapatra, K K* |

**2006 ** | Development of Low Power Image Compression Techniques | *Pattanaik, S K*; *Mahapatra, K K* |

**2008 ** | HCS08 Microcontroller based Novel PWM Controller for Battery Charger Application | *Kumar K, S*; *Pattanaik, Sushant Kumar*; *Swain, Ayaskanta*; *Das, J K*; *Mahapatra, K K* |

**2008 ** | A Novel Soft-Switching Synchronous Buck Converter for Portable Applications | *Panda, Anup Kumar*; *Pattnaik, S*; *Mahapatra, K K* |

**2008 ** | A Novel Improved Soft Switching PWM DC-DC Converter | *Pattnaik, S*; *Panda, A K*; *Mahapatra, K K* |

**2008 ** | A Novel Control Strategy for 400 Hz Aircraft Power Supply Using Resonant DC Link Inverter | *Pattanaik, Sushant Kumar*; *Mahapatra, K K* |

**2008 ** | Aircraft Power Supply Design using Soft-Switched Inverter | *Pattanaik, Sushant Kumar*; *Mahapatra, K K* |

**2008 ** | Analysis of Non-isolated Soft Switching DC-DC Buck Converter | *Patnaik, S*; *Panda, A K*; *Mahapatra, K K* |

**2008 ** | Low Power Filter Design using a Novel Dual Edge Triggered Latch | *Das, J K*; *Mahapatra, K K* |

**2009 ** | Fuzzy Logic Based Integrated Control of Anti-Lock Brake System and Collision Avoidance System using CAN for Electric Vehicles | *Kumar K, S*; *Verghese, L*; *Mahapatra, K K* |

**2009 ** | A Novel Control Circuit for Aircraft Power Supply Using Soft-Switched Inverter | *Pattanaik, Sushant Kumar*; *Mahapatra, K K* |

**2010 ** | Low Cost System on Chip Design for Audio Processing | *Swain, Ayaskanta*; *Mahapatra, K K* |

**2010 ** | Image Compression Using Discrete Tchebichef Transform Algorithm | *Senapati, R K*; *Pati, U C*; *Mahapatra, K K* |

**2010 ** | PI with Fuzzy Logic Controller based APLC for compensating harmonic and reactive power | *Karuppanan, P*; *Mahapatra, K K* |

**2010 ** | A Novel Active Power Line Conditioners using PLL Synchronization and PI Controller | *Karuppanan, P*; *Mahapatra, K K* |

**2010 ** | Operational Amplifier based Control Circuit for Single Phase Multiple PWM Inverter for Induction Motor Drive Application | *Karuppanan, P*; *Mahapatra, K K* |

**2010 ** | Fuzzy Logic Controlled Active Power Line Conditioners for Power quality Improvements | *Karuppanan, P*; *Mahapatra, K K* |

**2010 ** | PID with PLL Synchronization Controlled Shunt APLC under Non-Sinusoidal and Unbalanced Conditions | *Karuppanan, P*; *Mahapatra, K K* |

**2010 ** | Design of a Pipelined FIR Filter Using Application Description Language | *Nanda, U*; *Mahapatra, K K* |

**2010 ** | Design of an Application Specific Instruction Set Processor Using LISA | *Nanda, U*; *Mahapatra, K K* |

**2010 ** | FPGA Implementation of Fuzzy Logic Controller For Elevator Group Control System | *Patjoshi, R K*; *Mahapatra, K K* |

**2010 ** | Power Loss Estimation for PWM and Soft-switching Inverter using RDCLI | *Pattanaik, Sushant Kumar*; *Mahapatra, K K* |

**2010 ** | PI with Instantaneous Power Theory Based Shunt APLC for Power Quality | *Karuppanan, P*; *Mahapatra, K K* |

**Sep-2010 ** | 2-D Separable Discrete Hartley Transform Architecture for Efficient FPGA Resource | *Sharma, V K*; *Agrawal, R*; *Pati, U C*; *Mahapatra, K K* |

**Nov-2010 ** | A Novel Fast Zigzag Prune 4×4 Discrete Tchebichef Moment Based Image Compression Algorithm | *Senapati, R K*; *Pati, U C*; *Mahapatra, K K* |

**Dec-2010 ** | PLL with PI, PID and Fuzzy Logic Controllers based Shunt Active Power Line Conditioners | *Karuppanan, P*; *Mahapatra, K K* |

**Dec-2010 ** | A Novel SRF Based Cascaded Multilevel Active Filter for Power Line Conditioners | *Karuppanan, P*; *Mahapatra, K K* |

**Dec-2010 ** | Design and Verification of WISHBONE Bus Interface for System-on-Chip Integration | *Swain, Ayaskanta*; *Mahapatra, K K* |

**Dec-2010 ** | A Low Complexity Orthogonal 8×8 Transform Matrix for Fast Image Compression | *Senapati, R K*; *Pati, U C*; *Mahapatra, K K* |

**Dec-2010 ** | An Study of Removal of Subjective Redundancy in JPEG for Low Cost, Low Power, Computation efficient Circuit Design and High Compression Image | *Sharma, V K*; *Pati, U C*; *Mahapatra, K K* |

**2011 ** | An Active and Reactive Power Analysis of Solid Oxide Fuel Cell | *Bhuyan, K C*; *Mahapatra, K K* |

**2011 ** | Three Level Hysteresis Current Controller based Active Power Filter for Harmonic Compensation | *Karuppanan, P*; *Ram, S K*; *Mahapatra, K K* |

**2011 ** | An Accurate Estimation of Power using Verilog | *Guntupalli, R*; *Mahapatra, K K* |

**2011 ** | Cascaded Multilevel Inverter based Active Filter for Power Line Conditioners using Instantaneous Real-Power Theory | *Karuppanan, P*; *Mahapatra, K K* |

**2011 ** | Carbon Nanotube Interconnects for VLSI Design-A state of the art | *Mahapatra, K K* |

**Jan-2011 ** | A Simple VLSI Architecture for Computation of 2-D DCT, Quantization and Zig-zag ordering for JPEG | *Sharma, V K*; *Pati, U C*; *Mahapatra, K K* |

**Jan-2011 ** | An Efficient Sparse 8×8 Orthogonal Transform Matrix for Color Image Compression | *Senapati, R K*; *Pati, U C*; *Mahapatra, K K* |

**Feb-2011 ** | An Efficient Distributed Arithmetic based VLSI Architecture for DCT | *Sharma, V K*; *Mahapatra, K K*; *Pati, U C* |

**Feb-2011 ** | A Novel Hybrid HVS Based Embedded Image Coding Algorithm Using DTT and SPIHT | *Senapati, R K*; *Pati, U C*; *Mahapatra, K K* |

**Jun-2011 ** | A Low-Power Circuit Technique for Dynamic CMOS Logic | *Meher, P*; *Mahapatra, K K* |

**Jun-2011 ** | A New Ultra Low-Power and Noise Tolerant Circuit Technique for CMOS Domino Logic | *Meher, P*; *Mahapatra, K K* |

**Oct-2011 ** | A Low Power Circuit Technique for Feedthrough Logic | *Sahoo, S R*; *Mahapatra, K K* |

**Dec-2011 ** | An ASIP for Image Enhancement Applications in Spatial Domain using LISA | *Sarma, Anup*; *Sutar, Soubhagya*; *Sharma, V K*; *Mahapatra, K K* |

**Dec-2011 ** | Fryze Power Theory with Adaptive-HCC based Active Power Line Conditioners | *Karuppanan, P*; *Mahapatra, K K*; *Jeyaraman, K*; *Viji, J* |

**Dec-2011 ** | An Intelligent Control of Solid oxide Fuel cell voltage | *Bhuyan, K C*; *Mahapatra, K K* |

**Dec-2011 ** | A Low Complexity Embedded Image Coding Algorithm Using Hierarchical Listless DTT | *Senapati, R K*; *Pati, U C*; *Mahapatra, K K* |

**Feb-2012 ** | An Improved Low Dynamic Power High Performance Adder | *Sahoo, S R*; *Mahapatra, K K* |

**Feb-2012 ** | Class-C Power amplifier Design For GSM Application | *Samal, L*; *Mahapatra, K K*; *K, Raghu Ram* |

**Mar-2012 ** | A New Approach for High Performance and Efficient Design of CORDIC Processor | *Jain, R K*; *Sharma, V K*; *Mahapatra, K K* |

**Mar-2012 ** | Performance Analysis of Modified Feedthrough Logic for Low Power and High Speed | *Sahoo, S R*; *Mahapatra, K K* |

**Mar-2012 ** | An Improved Feedthrough Logic for Low Power Circuit Design | *Sahoo, S R*; *Mahapatra, K K* |

**Mar-2012 ** | Improved Techniques for High Performance Noise-Tolerant Domino CMOS Logic Circuits | *D, Srinivasa V S Sarma*; *Mahapatra, K K* |

**Mar-2012 ** | Fuel Cell connected to Grid through Inverter | *Bhuyan, K C*; *Sao, S K*; *Mahapatra, K K* |

**Jul-2012 ** | A High Speed Encoder for a 5GS/s 5 Bit Flash ADC | *Varghese, G T*; *Mahapatra, K K* |

**Nov-2012 ** | Design of Fuzzy Logic Controller based on TMS320C6713 DSP | *Maji, P*; *Patra, S K*; *Mahapatra, K K* |

**Dec-2012 ** | A High Speed Low Power Encoder for a 5 Bit Flash ADC | *Varghese, G T*; *Mahapatra, K K* |

**Dec-2012 ** | Design and Error Analysis of a Scale Free CORDIC Unit with Corrected Scale Factor | *Prasad, N*; *Swain, A K*; *Mahapatra, K K* |

**Dec-2012 ** | Design and analysis of five port Router for network on chip | *S, Swapna*; *Swain, K K*; *Mahapatra, K K* |

**2013 ** | Performance Evalulation of Different Routing Algorithms in Network on Chip | *Singh, J K*; *Swain, A K*; *Reddy, T N K*; *Mahapatra, K K* |

**Jan-2013 ** | An Ultra Low Power Encoder for 5 Bit Flash ADC | *Lavania, Y*; *Varghese, G T*; *Mahapatra, K K* |

**Feb-2013 ** | FPGA for Reliance on Cloud Computing | *Mohanty, J P*; *Mahapatra, K K* |

**Mar-2013 ** | FPGA Implementation of Pipelined CORDIC Based Quadrature Direct Digital Synthesizer with Improved SFDR | *Prasad, N*; *Swain, A K*; *Mahapatra, K K* |

**Mar-2013 ** | Low Latency VLSI Architecture of S-box for AES Encryption | *Kumar, S*; *Sharma, V K*; *Mahapatra, K K* |

**Apr-2013 ** | Performance Analysis of Shunt Active Power Filter using PLL based Control Algorithms Under Distorted Supply Condition | *Patjoshi, R K*; *Mahapatra, K K* |

**Apr-2013 ** | Development and Implementation of Control Algorithms For a Photovoltaic System | *Kolluru, V R*; *Mahapatra, K K*; *Subudhi, B D* |

**Apr-2013 ** | Real-Time Implementation of Fast Fourier Transform (FFT) and Finding the Power Spectrum Using LabVIEW and CompactRIO | *Das, A D*; *Mahapatra, K K* |

**Apr-2013 ** | An Improved VLSI Architecture of S-box for AES Encryption | *Kumar, S*; *Sharma, V K*; *Mahapatra, K K* |

**Jul-2013 ** | Realization of Reconfigurable FLC on ADSP-BF537 Processor | *Maji, P*; *Patra, S K*; *Mahapatra, K K*; *Govindarajan, J*; *Patel, J J* |

**Nov-2013 ** | Design & Performance analysis of D-STATCOM for Non-Linear Load Composite Compensation | *Sahu, G*; *Mahapatra, K K*; *Sahu, S K* |

**Dec-2013 ** | A New Approach to Fast Tracking and Low Cost Single Exponential Model Photovoltaic System | *Kolluru, V R*; *Mahapatra, K K*; *Subudhi, B* |

**Dec-2013 ** | New Control Strategy of Unified Power Quality Conditioner with Sliding Mode Approach | *Patjoshi, R K*; *Mahapatra, K K* |

**Dec-2013 ** | Real Time Implementation of Digital Filter on Control strategy of DSTATCOM for Load Compensation under Distorted Utility Condition | *Sahu, G*; *Mahapatra, K K* |

**2014 ** | A Novel Bit Stuffing technique for Controller Area Network (CAN) Protocol | *Jena, T R*; *Swain, A K*; *Mahapatra, K K* |

**2014 ** | Design of Low-Leakage and High Stable Proposed SRAM cell Structure | *Nayak, D*; *Acharya, D P*; *Rout, P K*; *Mahapatra, K K* |

**2014 ** | Implementation of Fuzzy-PID Controller to Liquid Level System using LabVIEW | *Prusty, S B*; *Pati, U C*; *Mahapatra, K K* |

**Jan-2014 ** | Design and Implementation of Modified Sliding Mode Controller for a Photovoltaic System | *Kolluru, V R*; *Mahapatra, K K*; *Subudhi, B* |

**Jan-2014 ** | A novel control strategy of DSTATCOM for load compensation under distorted utility condition | *Sahu, G*; *Mahapatra, K K* |

**Mar-2014 ** | Performance Assessment of Different Network-on-Chip Topologies | *Reddy, T N K*; *Swain, A K*; *Singh, J K*; *Mahapatra, K K* |

**Apr-2014 ** | Robust Facial Expression Recognition using Gabor Feature and Bayesian Discriminating Classifier | *Piparsaniyan, Yamini*; *Sharma, V K*; *Mahapatra, K K* |